? semiconductor components industries, llc, 2011 october, 2011 ? rev. 0 1 publication order number: emd5384/d ESD5384 5-line hdmi control line esd protection functional description the ESD5384 chip is a low capacitance esd protection for hdmi control pins. it also integrates pull ? up resistor for i 2 c bus and pull ? down resistor for hot plug detect and pull ? up resistor for cec line. the esd protection circuitry prevents damage to the protected device when subjected to esd surges up to 15 kv. the ESD5384 is available in 9 bump csp package. features ? line capacitance: 12 pf max ? iec 61000 ? 4 ? 2 level 4 ? 15 kv (air discharge) ? 8 kv (contact discharge) ? this is a pb ? free device applications ? hdmi control line interfaces ? smart phones ? tablets ? consumer electronics figure 1. electrical schematic a1 a3 c1 b1 c3 b3 b2, c2 ESD5384 27k 100k 1.75k 1.75k 5v hpd sda scl cec a2 wlcsp9 case 567cx marking diagram http://onsemi.com 53 = specific device code m = date code 53m see detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. ordering information 1 2 3 c b a pinout rpu2 rpu cec gnd gnd scl sda hpd 5v (bump side)
ESD5384 http://onsemi.com 2 absolute maximum ratings symbol parameter value unit v pp external pins (a1, a2, a3, b3 and c3): esd iec 61000 ? 4 ? 2, level 4 ? air discharge esd iec 61000 ? 4 ? 2, level 4 ? contact discharge internal pins (b1, c1): esd iec 61000 ? 4 ? 2, level 1 ? air discharge esd iec 61000 ? 4 ? 2, level 1 ? contact discharge 15 8 2 2 kv t op operating temperature range ? 30 to +85 c t stg storage temperature range ? 55 to +150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. electrical characteristics (note 1) symbol test condition min typ max unit v br breakdown voltage (i r = 1ma) 6 20 v i rm leakage current @ v rm (v rm = 3 v per line), excluding hpd line 50 200 na i rm leakage current @ v rm (v rm = 3 v per line), hpd line 32 a r1, r2 resistance 1575 1750 1925 r3 pull ? up resistance 80 100 120 k r4 pull ? up resistance 22 27 32 k c line v line = 0 v, v osc = 30 mv, f = 1 mhz, a2 with b1 not connected 14 17 pf v line = 0 v, v osc = 30 mv, f = 1 mhz, a3, b3 with c1 not connected. 24 29 v line = 0 v, v osc = 30 mv, f = 1 mhz, a2, a3, b3 with c1 and b1 grounded 10 12 1. all parameters specified at t a = 25 c unless otherwise noted. typical characteristics figure 2. crosstalk measurements
ESD5384 http://onsemi.com 3 typical characteristics figure 3. esd clamping voltage screenshot positive 8 kv contact per iec61000 ? 4 ? 2, cec line figure 4. esd clamping voltage screenshot negative 8 kv contact per iec61000 ? 4 ? 2, cec line figure 5. esd clamping voltage screenshot positive 8 kv contact per iec61000 ? 4 ? 2, scl line figure 6. esd clamping voltage screenshot negative 8 kv contact per iec61000 ? 4 ? 2, scl line figure 7. esd clamping voltage screenshot positive 8 kv contact per iec61000 ? 4 ? 2, sda line figure 8. esd clamping voltage screenshot negative 8 kv contact per iec61000 ? 4 ? 2, sda line
ESD5384 http://onsemi.com 4 typical characteristics figure 9. esd clamping voltage screenshot positive 8 kv contact per iec61000 ? 4 ? 2, hpd line figure 10. esd clamping voltage screenshot negative 8 kv contact per iec61000 ? 4 ? 2, hpd line figure 11. esd clamping voltage screenshot positive 8 kv contact per iec61000 ? 4 ? 2, 5 v line figure 12. esd clamping voltage screenshot negative 8 kv contact per iec61000 ? 4 ? 2, 5 v line
ESD5384 http://onsemi.com 5 iec61000 ? 4 ? 2 spec. level test voltage (kv) first peak current (a) current at 30 ns (a) current at 60 ns (a) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 i peak 90% 10% iec61000 ? 4 ? 2 waveform 100% i @ 30 ns i @ 60 ns t p = 0.7 ns to 1 ns figure 13. iec61000 ? 4 ? 2 spec figure 14. diagram of esd clamping voltage test setup 50 50 cable tvs oscilloscope esd gun the following is taken from application note and8308/d ? interpretation of datasheet parameters for esd devices. esd voltage clamping for sensitive circuit elements it is important to limit the voltage that an ic will be exposed to during an esd event to as low a voltage as possible. the esd clamping voltage is the voltage drop across the esd protection diode during an esd event per the iec61000 ? 4 ? 2 waveform. since the iec61000 ? 4 ? 2 was written as a pass/fail spec for larger systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. on semiconductor has developed a way to examine the entire voltage waveform across the esd protection diode over the time domain of an esd pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all esd protection diodes. for more information on how on semiconductor creates these screenshots and how to interpret them please refer to and8307/d. figure 15. 8 x 20 s pulse waveform 100 90 80 70 60 50 40 30 20 10 0 020406080 t, time ( s) % of peak pulse current t p t r pulse width (t p ) is defined as that point where the peak current decay = 8 s peak value i rsm @ 8 s half value i rsm /2 @ 20 s
ESD5384 http://onsemi.com 6 figure 16. positive tlp i ? v curve figure 17. negative tlp i ? v curve transmission line pulse (tlp) measurement transmission line pulse (tlp) provides current versus voltage (i ? v) curves in which each data point is obtained from a 100 ns long rectangular pulse from a charged transmission line. a simplified schematic of a typical tlp system is shown in figure 18. tlp i ? v curves of esd protection devices accurately demonstrate the product?s esd capability because the 10s of amps current levels and under 100 ns time scale match those of an esd event. this is illustrated in figure 19 where an 8 kv iec61000 ? 4 ? 2 current waveform is compared with tlp current pulses at 8 a and 16 a. a tlp i ? v curve shows the voltage at which the device turns on as well as how well the device clamps voltage over a range of current levels. a typical tlp i ? v curve for the esd7383 is shown in figures 16 and 17. figure 18. simplified schematic of a typical tlp system dut l s oscilloscope attenuator 10 m v c v m i m 50 coax cable 50 coax cable figure 19. comparison between 8 kv iec61000 ? 4 ? 2 and 8 a and 16 a tlp waveforms
ESD5384 http://onsemi.com 7 typical application schematic figure 20. typical application schematic 1 2 3 4 5 6 7 8 9 12 11 10 hdmi type c connector 19 18 17 16 15 14 13 data2 shield data2 + data2 ? data1 shield data1 + data1 ? data0 + data0 ? data0 shield clk shield clk + ddc ground cec clk ? scl sda reserved +5 power hpd data2 + data2 ? data1 + data1 ? data0 + data0 ? clk + clk ? cec scl sda +5 power hpd 5v vdd_cec a1 a3 c1 b1 c3 b3 b2, c2 ESD5384 27k 100k 1.75k 1.75k 5v hpd sda scl cec a2 esd7484 a1 a3 c1 d1 f1 c3 d3 f 3 b2 e2 esd7484 a1 a3 c1 d1 f1 c3 d3 f 3 b2 e2 ordering information part number chip size (mm) package shipping ? ESD5384 1.14 x 1.14 x 0.605 wlcsp9 (pb ? free) 5000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ESD5384 http://onsemi.com 8 package dimensions wlcsp9, 1.14x1.14 case 567cx ? 01 issue o seating plane 0.05 c notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. coplanarity applies to spherical crowns of solder balls. 2x dim a min max 0.57 millimeters a1 d 1.14 bsc e b 0.24 0.29 e 0.40 bsc 0.63 d e a b pin a1 reference a 0.05 b c 0.03 c 0.05 c 9x b 12 3 c b a 0.05 c a a1 a2 c 0.17 0.24 1.14 bsc 0.40 0.25 9x dimensions: millimeters *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.05 c 2x top view side view bottom view note 3 e a2 0.41 ref recommended a1 package outline e pitch 0.40 pitch on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 ESD5384/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loca l sales representative
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